Abstract: This design realizes the low phase noise index that is difficult to achieve by conventional frequency division phase-locked loops by means of harmonic mixing. On the basis of theoretical analysis, the design scheme of microwave low phase noise phase-locked loop is proposed, and the actual circuit structure is established. By debugging the circuit, the phase output at -5.5.30 dBc/Hz@10 kHz is achieved at 5.5 GHz. Noise index and spurs of -67.33 dBc. The feasibility of realizing microwave low phase noise phase locking by means of harmonic mixing is verified.
Key words: low phase noise; harmonic mixing; phase-locked source; spur indicator
It is well known that the phase noise within the loop bandwidth of the phase-locked loop is mainly determined by the phase noise after the frequency oscillator is degraded by the crystal oscillator and the phase noise introduced by the phase detector. The phase noise outside the loop bandwidth is mainly determined by the phase noise of the VCO and the deterioration of the noise floor introduced by the phase detector. That is, the PLL exhibits a low-pass characteristic to the reference crystal noise source and a high-pass characteristic to the VCO noise. Therefore, through the conventional frequency division phase locking method, a good phase noise index cannot be obtained due to the high phase discrimination frequency of the phase detector and the deterioration of the noise floor.
When the phase noise level of the local oscillator is very high, the phase noise of the RF output is basically the same as the phase noise of the mixed-frequency IF signal, which provides a solution for obtaining low phase noise, that is, by harmonic mixing. Decreasing the frequency of the RF input of the phase detector and using the local oscillator with good phase noise level, the noise of the base will not be further deteriorated, so the phase noise of the system output is determined by the phase noise of the phase detector. Since the RF feedback input frequency of the phase detector is greatly reduced, the phase noise of the output signal is greatly improved compared to the conventional frequency division phase locked loop.
1 phase-locked source circuit design
1.1 Circuit Specifications
The expected technical indicators of this microwave low phase noise phase lock design are:
(1) Phase noise: -110 dBc/Hz@10 kHz.
(2) Operating frequency: 5.5 GHz.
(3) Stray level: less than -60 dBc.
(4) Output power: greater than 0 dBm.
1.2 Circuit Design
The basic composition of the phase-locked loop is composed of a VCO, a phase detector, a low-pass filter, and a reference frequency source. The harmonic mixing used in this design is different from the conventional frequency-divided phase-locked system. The harmonic mixing phase-locked system does not use the general frequency divider in the feedback loop but uses harmonic mixing to oscillate the feedback. The signal is processed back to the RF input port of the phase detector. The purpose of this is to enable the system to obtain the IF signal with better phase noise level by mixing to the RF feedback input of the phase detector to realize the low phase noise signal output by the phase lock system. This is the frequency division lock. An indicator that is difficult to achieve with a phase system. Its principle block diagram is shown in Figure 1.
The phase detector in this circuit uses ADF4113 from Analog Devices, Inc., and the loop filter is composed of RC integral filter. The VCO operates at 5.5 GHz, and HitTIte's HMC431LP4 is used here. In the design, one input and one output port are reserved, one of which is sent as a feedback signal of the VCO to the output port of the harmonic mixing working part, and the output port has a signal frequency of 5.5 GHz; the other port serves as a reference. The phaser feeds back the input signal port. The 5.5 GHz RF signal is mixed with the fourth harmonic of the local oscillator input signal of 1.2 GHz in the harmonic mixing working part, and finally the output of the 700 MHz intermediate frequency signal is fed back to the phase detector for phase discrimination. Thereby, the output signal frequency of the control voltage control VCO is obtained, and the function of harmonic mixing and phase locking is realized.
The input of the loop filter is connected to the ADF4113 integrated phase detector, and the output is connected to the voltage controlled oscillator VCO. The filter has a low-pass characteristic that acts as a low-pass filter, but more importantly it also plays a decisive role in the adjustment of the loop parameters, which has a significant impact on loop performance. This design uses a fourth-order RC integration filter, as shown in Figure 2.
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